3D companies address critical areas

It’s only Tuesday, and already, it’s been a productive week for 3D news.

Yesterday, SUSS and 3M announced an agreement in which SUSS becomes an authorized equipment supplier for 3M’s temporary bond and debond process. As such, SUSS’s 300mm wafer bonders will be configured to support 3M’s process and materials. This ties in to SUSS’s 3D strategy, which according to Wilfried Bair, general manager, Wafer Bonder Division, SUSS MicroTec, is to provide “a flexible, modular platform” configurable to customer needs. He recently explained to me that how you debond depends on the materials you bond with. Carrier wafer processes have been used in manufacturing high power devices for years, but the requirements around 3D are different, when you consider that instead of 200mm wafers, you’re potentially dealing with 300mm wafers thinned to 50µm. The fewer the steps, and lower the temperature, the better. So the advantages to the 3M process is that there’s only one carrier wafer step involved, it’s fast, clean, and can be done at room temperature.

Today, Alchimer SA, made a three-fold announcement, leading off with the news that it received its 3rd round of funding in the amount of $10M to expand customer-support programs and pursue new IP development. This is a significant achievement given the current economic climate. Additionally, the company formally welcomed Kathy Cook aboard as business development manager, who brings a solid background from previous positions at SUSS MicroTec, Applied Materials, Millipore, and ULVAC Technologies. (Incidentally Kathy, don’t let them call you “veteran” again in a press release. It makes you sound MUCH older than you are.) Alchimer also announced an agreement with Nagase Ltd., a Tokyo-based marketing firm, to help them meet the demand of the Japanese market.This news, coupled with last week’s announcement that the company had achieved an 80% reduction in cost-of-ownership for its egViaCoat processes indicates that this company is really on to something with this low-cost wet deposition alternative for TSV copper seed.

Lastly, DEK international stepped into the 3D arena, combining efforts with CHAD to incorporate DEK’s thin wafer system with CHAD’s wafer handler, thereby addressing traditional challenges associated with high-speed handling and processing of thinned wafers for emerging 3D packaging, wafer coating and ball placement processes. The companies plan to demonstrate their capabilities during SEMICON West. I look forward to learning more about this at the show.

Individually, these announcements have nothing to do with one another, but collectively, they can be used to illustrate how the industry is addressing some of the remaining critical areas of 3D integration with TSV interconnects. Insulator barrier/ seed, and wafer bonding; — particularly temporary bonding and debonding — and thin wafer handling have been pointed out as areas still needing cost-effective solutions. Looks like we’re making progress. – F.v.T.

Following the 3D innovation path to profitability

In last week’s email update, I talked about the pendulum starting to swing back the other way, albeit ever so slightly. It’s little things, such as SEMI’s book-to-bill rising from a frightening .48 to a less ominous .61; to bigger things, like TSMC announcing they will invest in R&D despite a hiring freeze in other sectors. As part of it's roadmap to innovate its way out of the slump, the company claims it will have its 300mm fab ready to manufacture TSVs by June. This is exciting news for equipment and material suppliers who have committed to investing in TSV processes.

Whether or not you're a proponent of TSV, it’s clear that companies who are investing in those technologies are faring better these than those who are hacking away at the bottom line to weather the storm. It seems to be working for SUSS MicroTec and EV Group, who have both invested in developing tool sets for wafer bonding, lithography, and mask aligning for the 3D IC integration market. Last week, SUSS announced an order from Nemotek Technologie for multiple lithography systems to be used for manufacturing the company’s CMOS images sensors (CIS). As CIS was the first application to adopt TSV processes in volume production, this win helps establish SUSS as an equipment provider for CIS.

On the heels of that news, came EV Group’s announcement that they will increase production capacity due to “strong order intake” driven by R&D investment in the 3D IC and nanoimprint lithography markets. EV Group strategically established itself in academia, shrewdly anticipating that while capex spending would fall off in the public sector, universities and research institutes would be investing in 3D IC integration to be ready for the rebound.

In his recent SemiSpice blog post, Tom Morrow recounts the different approaches taken by both Kelloggs and Post to survive the Great Depression. Reading it, I thought of Lam Research and Applied Materials (AMAT), equipment vendors who both offer etch tools for 3D IC applications. See if you can guess who is the Post and who is Kelloggs in this scenario. In December 2008, AMAT made headlines with its launch of the Silvia etch tool, then joining EMC^3D and most recently entering into a joint development agreement with Disco to develop wafer thinning processes for TSVs. The only news I’ve seen about Lam in the same time frame is a layoff of 600 employees in November, and another 375 in March. Both layoffs were part of a plan to reduce Lam’s cost structure. In December, Applied announced a cash dividend, while in April, Lam announced a quarterly loss.

While cost cutting may help the bottom line in the short term, it’s my experience that in the long run, innovation and investment goes a lot further to improve a company’s image and ultimately its bottom line, not to mention establish company moral and loyalty. Kudos to the companies and organizations that choose not only to invest and innovate, but also publicize accomplishments. It gives us all something to strive for. -- F.v.T.

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Notes from the Exhibition Hall

I have to admit that this year at IMAPS Device Packaging Conference, I spent more time attending technical sessions and less time with the exhibitors than I usually do at an industry event. However, I did manage to check in with a few of them to see what their latest contributions are to the 3D IC and 3D Packaging realm.

Palomar Technologies
I wasn’t surprised to run into Bradley Benton at the Palomar booth – I pretty much expect to see him at these events. In fact, he gave me my first comprehensive lesson in the history of wire bond technologies. I was, however, surprised to learn that the company, which is firmly established in the wire bond business, is venturing into the TSV space with its 6500 Eutectic Die Attach System. Benton says the tool is designed to perform die to wafer processes, and achieves 1.5 µm placement accuracies.

“We recognize that TSV is coming,” he noted. “We have some TSV capabilities now. We’re looking into ways of enhancing that.” Benton says his interest in 3D packaging is why he got into this business 26 years ago. “I always assumed microelectronics would build up and not out.” He said. “What’s new is that we’re finally going at it and doing it with silicon.

SUSS MicroTec
I caught up with Kathy Cook of SUSS MicroTec at the tail end of the poster sessions on Thursday, where she was presenting a poster based on Margarete Zoberbier’s recent presentation at SEMICON Korea about some of SUSS’ equipment technologies for TSVs. Cook explained that polymers adhesives may be necessary for permanent bonding when copper alone isn’t enough to hold the wafers together. The take-away message was the company’s achievement of submicron post bond alignment accuracy (.35µm) for permanent bonding and several other new capabilities involving SUSS’s latest 300mm tools – ACS300 Gen 2 Coater and the MA300 mask aligner. The 300mm permanent bonder is the XBC300. SUSS has recently achieved some excellent results in the area of thin wafer handling as well.

Tango Systems
Martijn Pierik, of Impress PR, introduced me to the folks at Tango Systems, who were showcasing the company’s flagship PVD system, the Axcela. Ravi Mullapudi, president and CEO, explained how the tool was suited to perform barrier and seed layer processes for TSV, which have been identified as areas still to be addressed from a cost of ownership perspective. He said this dry, vacuum process uses rotating targets in the chamber to perform both steps in one process. The tool can accommodate 150, 200 and 300mm wafers, with quick changover.

Surface Technology Systems
In between catching up on non-industry related news, my good friend Michelle Bourke of STS, clued me in on the companies continued work with improved control of TSV profiles. STS has made lots of progress in maintaining the delicate balance between high etch rates and excellent across-wafer etch depth uniformity. One exciting bit of news she shared with me was the company’s recent R& D success with high speed deep reactive ion etch (DRIE) at 106µm/min. While the process needs to be refined, the point is, they’ve achieved it. So expect to see more on this as the process is tweaked. – F.v.T