Breaking News from Global Business Council

I promised that as soon as I knew who NEXX’s new collaboration was with, I would let you all know. At this moment, I’m sitting in a session in which Jean Trewhella, director of packaging research at IBM, is discussing the benefits of IBM’s collaborative efforts through their Common Platform Technology. “Collaboration allows us to get points of view from many different users, even if IBM is not serving that space, our partners will be, “ she says. And I’m thinking – aha! The major IDM has to be IBM.

Trewhalla said IBM has recognized a need for evolutionary and revolutionary developments in package technology to support the semiconductor industry. As such, the next phase of Common Platform will focus on 3D integration with the establishment of the New York Nanotechnology Packaging Center, which will integrate silicon partners, service providers, equipment providers, materials providers, and R&D providers and others. One of the material partnerships she identified was the recent agreement with Rohm and Haas.

It came during the Q&A portion of her presentation. Trewhalla announced the partnership with NEXX. So there you have it, hot off the press. – F.v.T

My 3D IC Blog-venture

While most of my blogging will be devoted to talking about what's happening in the world of 3D integration technologies, every once in a while you'll see a post devoted to the blog itself. It's where I explain to visitors, both returning and first-time, what my scope of coverage is, how to submit information for consideration, and tips on how to subscribe. I call it shameless self promotion.

While many of the companies on my radar also have a presence in other market segments, I'll be focusing on their activities as they pertain to 3D IC packaging innovations. So please don't feel slighted if you don't see coverage of a particular press release. It doesn't mean I don't care. I'll do my best to find a connection if there is one. If not, well then, maybe next time. Just keep them coming.

If you're looking for blog coverage serving a broader electronics industry market, check out Gail Writes 4 U. Well-known throughout the electronics industry as editor-in-chief of Advanced Packaging and SMT magazines, Gail Flower has launched her own blog to present coverage in a way that no one else can.

People keep asking how to subscribe to my blog, Françoise in 3D. I've enabled several tools to do this, none of which I'm an expert at explaining how to implement. Mostly I just click on links and follow the instructions. I suggest you try that first. There are two places to do this, at the top of the right hand navigation and after the very last post. There's also an invitation to become a follower. So far I have 3. I'd love for there to be more, so please sign up by clicking the link and following instructions. If all of this baffles you, email me at fvontrapp@gmail and we'll handle it the old-fashioned way. I'll add you to an opt-in subscriber list that will receive email updates once a week. Sound like a plan? -F.v.T

3D technology research gets another shot in the arm

It looks like it's 3D to the rescue again. I love it. Yesterday, a collaboration was announced by Semiconductor Research Corp. and Georgia Tech that involves the creation of the Interconnect Packaging Center (IPC). The center will be located at Georgia Tech in the Marcus Nanotechnology Building, and will involve the combined efforts of programs at Georgia Tech, Harvard, The University of Texas at Austin, Iowa State University and Singapore's Nanyang Technological University (NTU).

The goal is to develop interconnects that have improved communication between different chips via packaging while achieving an overall reduced chip footprint. And joy of joys, half of the research will focus on new 3D technologies.

This is the second 3D-focused, industry-academia project operating out of Georgia Tech. The 3D All Silicon System Module (3DASSM) Consortium, set to launch early this year, is a combined effort of Georgia Tech’s Microelectronics Packaging Research Center (PRC), the Fraunhofer IZM, KAIST, and (to date) 14 participating companies. Unlike the new IPC, the focus of this work is on packaging, not 3D ICs, and involves work with silicon interposers, wafer-level packaging, and thin-film embedded components to ultimately integrate the IC, package and board seamlessly.

So while not directly related to the collaboration with SRC and Georgia Tech, it certainly poses some interesting synergies. Rao Tummala must be dancing in the streets.

Mark your 3D event calendars

A few months back when Ziptronix first revealed details about its direct bond interconnect(DBI), CEO Dan Donabedian told me that one sign the market was ready for 3D integration processes was the demographic of attendees at conferences devoted to 3D IC packaging technologies. Rather than application and process engineers, he said, the seats are now occupied by marketing and business development people. So naturally that was the audience he targeted in his presentation at November’s 3-D Architectures for Semiconductor Integration and Packaging conference.

As we draw closer to adoption of these technologies, it’s important for all of us non-techies to get familiar these new processes, applications and market drivers. There are an assortment of upcoming events in the offering sessions and presentations on 3D.

SMTA’s Pan Pacific Microelectronics Symposium, Feb 10-12 on the island of Hawaii, offers a session on 3D assembly that I would suggest attending:

System-on-Wafer by The 3D All System Silicon Systems Technology consortium (Georgia Tech, Fraunhofer IZM),

Advanced Electrodeposition Technologies for 3D integration by Rozalia Beica and Paul Siblerud, Semitool, Inc.

Copper Electroplating Process for Next Generation Core Through-via Filling Stephen Kenny and Bernd Roelfs, Atotech Deutschland GmbH. I also hear the Luau is not to be missed.

Judging by the line-up at this year’s IMAPS International Device Packaging Symposium, the program organizers were on the ball with 3D topics. For example, a half-day professional course titled 3D Integration: Technology, Applications & Markets for 3D Integrated Circuits, lead by Phil Garrou of Microelectronics Consultants, is recommended for marketing and management people. As is the second half-day session lead by RPI’s James Jian-Qiang Lu titled 3D Integration and Packaging Technologies, Assessment, Status and Applications. And definitely don’t skip the And definitely don’t skip the 3D panel discussion: 3D Integration Technologies, Applications, and Roadmaps. There are also a plethora of sessions to choose from on TSV processes and other methods of 3D interconnect. It should be a great event. It was last year!

And finally,coming up in Nice, France on April 24th, Design Automation and Test in Europe (DATE) 2009 will tackle roadblocks to 3D adoption; process technology, architectures, esign methods and tools, and manufacturing test solutions. – F.V.T