Showing posts with label jet dispense. Show all posts
Showing posts with label jet dispense. Show all posts

Thursday, April 16, 2009

Another 3D supply chain success story

My post about Imbera’s achievements the other day reminded me of another supply chain success story I’ve been meaning to talk about. Last month at IMAPS Global Business Council, Marc Robinson of Vertical Circuits (VCI) shared how the start-up has successfully taken on an industry workhorse, (wire bond for die stacking) with an alternative that with something completely new and also cost-effective. VCI’s core technology is a “virtual via” interconnect that involves jet-dispensing silver filled polymer conformal conductive polymer up the edge of a chip stack to vertically connect bond pads.

Let’s face it, bringing an innovative process into volume production in the semiconductor industry is not a quick or easy task. This is a tough crowd we’re dealing with – very set in their ways. The message is clear – those that succeed the fastest are those that tend to leverage existing infrastructure, because any new process that also requires a new toolset is going to take a while to catch on. (Take IBM’S C4NP for wafer bumping, for example – great concept and an elegant, cost effective process, but required SUSS MicroTec to develop a completely new line of equipment. To date – the only install I’m aware of is at IBM’s facility in Fishkill, NY – please somebody correct me if I’m wrong!)

So how has VCI succeeded where others have been waylaid? According to Robinson, the first time out of the gate wasn’t so successful because they hadn’t taken the power of the existing supply chain seriously. They realized quickly they would have to fit its existing infrastructure conveniently to be adopted. “Until there was a supporting supply chain in place, it fell on doubting ears,” noted Robinson. This meant partnering with supply chain people —equipment and materials suppliers—and subsequently demonstrating how the process reduces the number of steps and the number of machines in the factory so that however the manufacturer looked at it, they would see the advantage. The message to device manufacturers: it’s not going to cost you more to adopt this technology.

So VCI developing partnerships with well-established equipment and materials suppliers such as Asymtek, Lord Corporation, Disco, SCS, and Resonetics, and then approached IDMS and OSATS for commercialization and IP licenses as a group. “We’ve signed a number of licenses now because we addressed them as a team,” noted Robinson. The equipment and material supply chain partners helped to convince customers that the supply chain is ready for adoption of VCI’s technology. Additionally, when they changed to a partnership approach, material and equipment suppliers also benefited, and VCI became successful in its endeavor.

All of these efforts have resulted in a process that has been implemented into micro SD cards. They are reportedly achieving 8 die stacks at 200µm pitch; more than enough for memory in a smaller footprint than wire bond. The company reports that the technology has been licensed to IDMs and OSATS (but can’t say who).

Although success didn’t come overnight – Robinson says he’s been working with this technology for 12 years – it’s still relatively quick in semiconductor years. (Consider that it took flip chip over 40 years to reach high-volume production). The important lesson is that the best way to succeed in this industry is with an “if you can’t beat ‘em, join ‘em” approach. It’s something to think about. – F.v.T

Monday, February 9, 2009

The Other 3D Packaging Technologies

While TSV developments continue to attract media attention as the rock star technology of 3D integration, it’s important to remember that it’s not the only game in town. As a member of said media, I must admit that it’s easy to get caught up in all TSV all the time, because it’s been exciting to follow, and there are a lot of elements that need to fall into place for market adoption. Therefore, it’s an easy target. But what about other 3D technologies that are making progress? Any journalist (or blogger) worth his or her salt knows that the best story ideas require a little digging, so here goes. This week I’ll focus on bringing readers up to date on some of these.

Vertical Circuits’ Vertical Interconnect Pillar Technology
Abbreviated to the acronym, VIP (clever, don’t you think?), this technology was developed as an alternative to both wire bond and TSV, overcoming scaling limitations of the former (up to 100 die have reportedly been proven) and design and cost limitations of the latter. VIP is actually the final step in a series of process steps that begins with standard die in wafer form. Die pads are re-routed to the periphery, and the die goes through an insulation process. The wafer is then thinned and die are singulated. Next the die are stacked and laminated together with an adhesive. Finally, conductors are jet dispensed on the edge of the die stack using Asymtek’s high speed, high accuracy jetting technology. The process involves existing equipment, and can be integrated into any existing back-end assembly line. Target applications include memory modules, embedded memory, and system-in-package.

This company and its technology made recent headlines with the announcement of its strategic partnership with DISCO, known for its high volume manufacturing (HVM) backgrind and dicing tools. As VCI’s process relies on wafer thinning and dicing techniques, the partnership allows them to offer an established toolset to the IDMs and packaging companies that license its technology.

Look for presentations from VCI at several upcoming industry events including IMAPS Device Packaging Symposium, ISTC/CSTIC 2009 (part of SEMICON China), 2009 MRS Spring Meeting, and ECTC 2009. – F.v.T.